Riverlane builds ground-breaking software to unleash the power of quantum computers. Backed by leading venture-capital funds and the University of Cambridge, we develop software that transforms quantum computers from experimental technology into commercial products.
You will join our cross-disciplinary team of software developers, mathematicians, quantum information theorists, computational chemists and physicists – all world experts in their fields. Our collaborative, close-knit team has a track record of delivering high-quality R&D across the full quantum stack. As a growing company, you will have the freedom to think independently and creatively, as well as contribute to Riverlane’s business development.
We offer a competitive salary, equity options, and relocation costs.
About the role
You will join our engineering team building Deltaflow.OS, a new operating system for quantum computers. As part of the SoC engineering team, you will help shape the future of our Deltaflow ecosystem by designing components and tools for FPGA. You will also work closely with our quantum hardware partners across the UK to define how quantum devices are developed from experimental systems into programmable computers.
Given the ground-breaking nature of our products we operate in a fast-moving and dynamic fashion: everyone in the Engineering and Quantum Science teams works with our Product and Business Development teams to define mid-term and long-term goals to best shape our products.
What you will do
• Understand key design requirements
• HDL coding (RTL) targeting high-speed, low-latency FPGA designs
• Generation of self-checking testbenches and HDL simulation
• FPGA integration on SoC platforms, in collaboration with the rest of the team
• FPGA hardware verification and debugging
What we need
• A master’s degree or PhD in Electronics Engineering, Computer Science or Physics
• At least two years of FPGA or ASIC design, preferably for commercial applications
• Proficiency in one HDL design language (VHDL, Verilog or System-Verilog)
• Familiarity with either Xilinx or Intel-FPGA toolchains
• Python programming (at least intermediate) and other scripting languages (e.g.: Tcl, bash)
• Good verbal and written communication skills
• Good team working skills
Even better if…
• Some familiarity with Linux OS
• Some C/C++ coding skills
• Embedded CPU design experience (Intel, Xilinx, Risc-V)
• High-Speed digital interfaces
• Low-Speed Serial communication protocols
• Digital Signal Processing (DSP), ADC and DAC interfaces
How to apply
Please upload a CV and covering letter here https://apply.workable.com/riverlane/j/3E93F013F1/ Your covering letter should explain why you are applying for the job and what skills and experience you can bring to the role.
If you have any queries, please contact firstname.lastname@example.org.
Everyone is welcome at Riverlane. We are an equal opportunities employer and encourage applications from eligible and suitably qualified candidates regardless of age, disability, ethnicity, gender, gender reassignment, religion or belief, sexual orientation, marital or civil partnership status, or pregnancy and maternity/paternity.